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Not able to get UmTRX v2.1 to work with UHD #17

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proteus-cpi opened this issue Feb 19, 2017 · 8 comments
Open

Not able to get UmTRX v2.1 to work with UHD #17

proteus-cpi opened this issue Feb 19, 2017 · 8 comments

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@proteus-cpi
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proteus-cpi commented Feb 19, 2017 •
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Trying to get couple of UmTRX v2.1 working with UHD with no luck :(
Steps followed:

  1. built and installed GNURadio and uhd using pybombs
  2. Checked out UHD-Fairwaves repo from GitHub.
  3. Rebuilt "host" software and set LD_LIBRARY_PATH to find the .so plugin
  4. Flashed the stock images from "./images" folder.
    • Flashing went fine.
    • On reset, noticed that the baud rate for the production image has changed from 230400 to 115200
    • tried uhd_find_device
      • No device found.
      • The debug console showed output similar to
USRP N210 UDP bootloader
FPGA compatibility number: 9
Firmware compatibility number: 12
SPI Flash has been initialized
Production image = 0
Checking for valid production FPGA image...
Valid production FPGA image found. Attempting to boot.

USRP N210 UDP bootloader
FPGA compatibility number: 9
Firmware compatibility number: 12
SPI Flash has been initialized
Production image = 1
Valid production firmware found. Loading...
Finished loading. Starting image.

TxRx-UHD-ZPU
FPGA compatibility number: 9
Firmware compatibility number: 12
LMS1 chip version = 0x22
LMS2 chip version = 0x22
00:1F:11:02:19:4C
192.168.10.2

eth link changed: speed = 0
ethernet flow control: WE_TX
Speed set to 1000

eth link changed: speed = 1000
!Error in control packet handler: Expected compatibility number 12, but got 1
!Error in control packet handler: Expected payload length 36, but got 16
!Error in control packet handler: Expected compatibility number 12, but got 1
!Error in control packet handler: Expected payload length 36, but got 16
!Error in control packet handler: Expected compatibility number 12, but got 109795
!Error in control packet handler: Expected compatibility number 12, but got 109795
  1. Rebuilt fpga and zpu firmware and flashed them
    • Flashing O.K.
    • Booted into image O.K.
    • tried uhd_find_device.
      • No device found.
      • Debug console shows same output as above.

What is the procedure to get the latest UHD-Fairwave working with UmTRX v2.1?
Any help appreciated.

proteus-cpi
@proteus-cpi
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proteus-cpi commented Feb 19, 2017 •
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Further observations

Made some further investigation. Found that UHD was not able to locate the umtrx plugin "libumtrx.so".
The path was added to LD_LIBRARY_PATH. But it looks like it is not sufficient and instead should be specified in UHD_MODULE_PATH.

uhd_find_devices

>> export UHD_MODULE_PATH=/opt/UmTRX/UHD/lib/uhd/modules

>> uhd_find_devices 
linux; GNU C++ version 5.4.0 20160609; Boost_105800; UHD_003.010.001.001-release

linux; GNU C++ version 5.4.0 20160609; Boost_105800; UHD_3.11.0.git-88-g180d5f3a

--------------------------------------------------
-- UHD Device 0
--------------------------------------------------
Device Address:
    serial: 76
    addr: 192.168.10.2
    name: UmTRX
    type: umtrx

However the program got stuck at that point. Debug console meanwhile shows:

USRP N210 UDP bootloader
FPGA compatibility number: 9
Firmware compatibility number: 12
SPI Flash has been initialized
Production image = 0
Checking for valid production FPGA image...
Valid production FPGA image found. Attempting to boot.

USRP N210 UDP bootloader
FPGA compatibility number: 9
Firmware compatibility number: 12
SPI Flash has been initialized
Production image = 1
Valid production firmware found. Loading...
Finished loading. Starting image.

TxRx-UHD-ZPU
FPGA compatibility number: 9
Firmware compatibility number: 12
LMS1 chip version = 0x22
LMS2 chip version = 0x22
00:1F:11:02:19:4C
192.168.10.2

eth link changed: speed = 0
ethernet flow control: WE_TX
Speed set to 1000

eth link changed: speed = 1000
ethernet flow control: WE_TX

eth link changed: speed = 0
Speed set to 1000

eth link changed: speed = 1000
!Error in control packet handler: Expected compatibility number 12, but got 1
!Error in control packet handler: Expected payload length 36, but got 16
!Error in control packet handler: Expected compatibility number 12, but got 1
!Error in control packet handler: Expected payload length 36, but got 16
!Error in control packet handler: Expected compatibility number 12, but got 109795
!Error in control packet handler: Expected compatibility number 12, but got 109795
ethernet flow control: WE_TX

eth link changed: speed = 0

Looks like there is still some version incompatibility between the UmTRX firmware and the libumtrx.so, though they were built out of the same checkout.

uhd_usrp_probe

Also uhd_usrp_probe crashed after outputing a few parameters from segmentation violation.

> uhd_usrp_probe                                                                                                                                                  
linux; GNU C++ version 5.4.0 20160609; Boost_105800; UHD_003.010.001.001-release

linux; GNU C++ version 5.4.0 20160609; Boost_105800; UHD_3.11.0.git-88-g180d5f3a

-- UmTRX driver version: 1.0.3-87-41390d6
-- Opening a UmTRX device... 192.168.10.2
-- user_mtu.recv_mtu = 1472
-- user_mtu.send_mtu = 1472
-- fifo_ctrl.window_size = 15
-- TempA: 44.625000 C
-- Detected UmTRX 2.1
-- Diversity switch for channel 1: false
-- Diversity switch for channel 2: false
-- Known PA types: NONE EPA881F40A EPA942H40A EPA1800F37A 
-- Installed PA for sideA: NONE
-- Installed PA for sideB: NONE
-- Time register self-test... pass
Segmentation fault (core dumped)

umtrx_test_chains

The command umtrx_test_chains however seems to be working!

linux; GNU C++ version 5.4.0 20160609; Boost_105800; UHD_003.010.001.001-release


Creating the usrp device with: ...
-- UmTRX driver version: 1.0.3-87-41390d6
-- Opening a UmTRX device... 192.168.10.2
-- user_mtu.recv_mtu = 1472
-- user_mtu.send_mtu = 1472
-- fifo_ctrl.window_size = 15
-- TempA: 51.562500 C
-- Detected UmTRX 2.1
-- Diversity switch for channel 1: false
-- Diversity switch for channel 2: false
-- Known PA types: NONE EPA881F40A EPA942H40A EPA1800F37A 
-- Installed PA for sideA: NONE
-- Installed PA for sideB: NONE
-- Time register self-test... pass
Using Device: Single USRP:
  Device: UmTRX Device
  Mboard 0: UMTRX-REV0
  RX Channel: 0
    RX DSP: 0
    RX Dboard: A
    RX Subdev: LMS6002D
  RX Channel: 1
    RX DSP: 1
    RX Dboard: B
    RX Subdev: LMS6002D
  TX Channel: 0
    TX DSP: 0
    TX Dboard: A
    TX Subdev: LMS6002D
  TX Channel: 1
    TX DSP: 1
    TX Dboard: B
    TX Subdev: LMS6002D

Setting TX Rate: 6.500000 Msps...
Actual TX Rate: 6.500000 Msps...

Setting RX Rate: 6.500000 Msps...
Actual RX Rate: 6.500000 Msps...

Setting device timestamp to 0...
===> TX test with DSP 0
success
===> TX test with DSP 1
success
===> TX test all DSP 
success
===> RX test with DSP 0
success
===> RX test with DSP 1
success
===> RX test all DSP 
success

Done!

proteus-cpi

@proteus-cpi
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Made some progress!

The latest libumtrx.so built from commit a59b9c3 against Ettus UHD release_003_010_000_000 looks mostly working.

uhd_usrp_probe

produces

linux; GNU C++ version 5.4.0 20160609; Boost_105800; UHD_003.010.000.ACD_WORK-0-g6e1ac3fc

-- UmTRX driver version: 1.0.3-89-190ed15
-- Opening a UmTRX device... 192.168.10.2
-- user_mtu.recv_mtu = 1472
-- user_mtu.send_mtu = 1472
-- fifo_ctrl.window_size = 15
-- TempA: 41.187500 C
-- Detected UmTRX 2.1
-- Diversity switch for channel 1: false
-- Diversity switch for channel 2: false
-- Known PA types: NONE EPA881F40A EPA942H40A EPA1800F37A 
-- Installed PA for sideA: NONE
-- Installed PA for sideB: NONE
-- Time register self-test... pass
  _____________________________________________________
 /
|       Device: UmTRX Device
|     _____________________________________________________
|    /
|   |       Mboard: UMTRX-REV0
|   |   hardware: 64000
|   |   mac-addr: 00:1f:11:02:19:4c
|   |   ip-addr: 192.168.10.2
|   |   subnet: 255.255.255.255
|   |   gateway: 255.255.255.255
|   |   gpsdo: none
|   |   serial: 76
|   |   name: UmTRX
|   |   tcxo-dac: 2048
|   |   pa_dcdc_r: 255
|   |   pa_en1: 1
|   |   pa_en2: 1
|   |   FW Version: 12.2-ga59b9c38
|   |   FPGA Version: 9.2
|   |   
|   |   Time sources:  none, external, _external_
|   |   Clock sources: internal, external
|   |   Sensors: tempA
|   |     _____________________________________________________
|   |    /
|   |   |       RX DSP: 0
|   |   |   
|   |   |   Freq range: -6.500 to 6.500 MHz
|   |     _____________________________________________________
|   |    /
|   |   |       RX DSP: 1
|   |   |   
|   |   |   Freq range: -6.500 to 6.500 MHz
|   |     _____________________________________________________
|   |    /
|   |   |       RX Dboard: A
|   |   |   ID: Unknown (0xfa07)
|   |   |   Serial: 76.A
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Frontend: 0
|   |   |   |   Name: LMS6002D
|   |   |   |   Antennas: RX0, RX1, RX2, RX3, CAL
|   |   |   |   Sensors: lo_locked
|   |   |   |   Freq range: 232.500 to 3720.000 MHz
|   |   |   |   Gain range VGA1: 5.0 to 30.2 step 0.1 dB
|   |   |   |   Gain range VGA2: 0.0 to 30.0 step 3.0 dB
|   |   |   |   Bandwidth range: 1000000.0 to 28000000.0 step 250000.0 Hz
|   |   |   |   Connection Type: IQ
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Codec: A
|   |   |   |   Name: RX LMS ADC
|   |   |   |   Gain Elements: None
|   |     _____________________________________________________
|   |    /
|   |   |       RX Dboard: B
|   |   |   ID: Unknown (0xfa07)
|   |   |   Serial: 76.B
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Frontend: 0
|   |   |   |   Name: LMS6002D
|   |   |   |   Antennas: RX0, RX1, RX2, RX3, CAL
|   |   |   |   Sensors: lo_locked
|   |   |   |   Freq range: 232.500 to 3720.000 MHz
|   |   |   |   Gain range VGA1: 5.0 to 30.2 step 0.1 dB
|   |   |   |   Gain range VGA2: 0.0 to 30.0 step 3.0 dB
|   |   |   |   Bandwidth range: 1000000.0 to 28000000.0 step 250000.0 Hz
|   |   |   |   Connection Type: IQ
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       RX Codec: B
|   |   |   |   Name: RX LMS ADC
|   |   |   |   Gain Elements: None
|   |     _____________________________________________________
|   |    /
|   |   |       TX DSP: 0
|   |   |   
|   |   |   Freq range: -6.500 to 6.500 MHz
|   |     _____________________________________________________
|   |    /
|   |   |       TX DSP: 1
|   |   |   
|   |   |   Freq range: -6.500 to 6.500 MHz
|   |     _____________________________________________________
|   |    /
|   |   |       TX Dboard: A
|   |   |   ID: Unknown (0xfa09)
|   |   |   Serial: 76.A
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       TX Frontend: 0
|   |   |   |   Name: LMS6002D
|   |   |   |   Antennas: TX0, TX1, TX2, CAL
|   |   |   |   Sensors: lo_locked
|   |   |   |   Freq range: 232.500 to 3720.000 MHz
|   |   |   |   Gain range VGA2: 0.0 to 25.0 step 1.0 dB
|   |   |   |   Gain range VGA1: -35.0 to -4.0 step 1.0 dB
|   |   |   |   Bandwidth range: 1000000.0 to 28000000.0 step 250000.0 Hz
|   |   |   |   Connection Type: IQ
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       TX Codec: A
|   |   |   |   Name: TX LMS DAC
|   |   |   |   Gain Elements: None
|   |     _____________________________________________________
|   |    /
|   |   |       TX Dboard: B
|   |   |   ID: Unknown (0xfa09)
|   |   |   Serial: 76.B
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       TX Frontend: 0
|   |   |   |   Name: LMS6002D
|   |   |   |   Antennas: TX0, TX1, TX2, CAL
|   |   |   |   Sensors: lo_locked
|   |   |   |   Freq range: 232.500 to 3720.000 MHz
|   |   |   |   Gain range VGA2: 0.0 to 25.0 step 1.0 dB
|   |   |   |   Gain range VGA1: -35.0 to -4.0 step 1.0 dB
|   |   |   |   Bandwidth range: 1000000.0 to 28000000.0 step 250000.0 Hz
|   |   |   |   Connection Type: IQ
|   |   |   |   Uses LO offset: No
|   |   |     _____________________________________________________
|   |   |    /
|   |   |   |       TX Codec: B
|   |   |   |   Name: TX LMS DAC
|   |   |   |   Gain Elements: None

Probably not everything is OK!
The following appreared on the debug console!

!Error in control packet handler: Expected compatibility number 12, but got 1
!EExpected comd compatibility number 12, but got 1
!Error in control packet handler: Expected payload length 36, but got 16
!Error in control packet handler: Expected compatibility number 12, but got 109

@proteus-cpi proteus-cpi reopened this Feb 21, 2017
@proteus-cpi
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Would appreciate information about the latest verified sets of UHD, UMTRX_UHD modules that are known to work together from the UmTRX team.

Regards

@Robert-steve
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Hi, I would like to know what os you are using. I am also having problems with the UHD.

@proteus-cpi
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Am using Ubuntu 16.04 LTS 64 bit.
USRP B200 works without a problem.

Regards

@Robert-steve
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I had it working on Ubuntu 14.04 LTS 64 bit with uhd-release_003_009_005.

@proteus-cpi
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proteus-cpi commented Feb 23, 2017 •
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Cool!
Will try uhd-release_003_009_005.

Did you use the latest on the master branch of UHD-Fairwaves to build libumtrx.so against the UHD uhd-release_003_009_005?

Tried it, UHD_003.009.005-0-g32951af2 with latest UHD-Fairwave. But still got the message on debug console:

!Error in control packet handler: Expected compatibility number 12, but got 1
!Error in control packet handler: Expected payload length 36, but got 16

Something is still not that right.

Thanks

@Robert-steve
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Did you try to download the appropriate firmware and fpga found in UHD-Fairwaves/images/ ?

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