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Facing issue while generating verilog #111
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@Sairam-Ganti this looks like a chisel3 version issue. Is it possible you have an old version of the chisel-tutorial repository? Please type the following command in the chisel-tutorial directory: $ git log -1 This should give the last commit for this clone of the chisel-tutorial branch. A: $ git checkout release
$ git pull should get you the latest version, after which an: $ sbt clean "test:run-main examples.Launcher GCD --backend-name verilator" should work. If this still fails, could you issue the following command: $ sbt clean "test:run-main examples.Launcher GCD --backend-name verilator" >& sbttest.out and attach the generated |
@ucbjrl `commit 1f8d68e
` |
Thanks @Sairam-Ganti. This looks like a chisel3/verilator version mismatch. Which version of verilator are you using? |
I've verified that this is an issue with newer versions of verilator. Until we update chisel3 to work with recent verilator releases, I suggest you use: Verilator 3.904 2017-05-30 |
@ucbjrl Thanks, will switch to the specified version and update with the result |
Hi, so I switched to the specified version of verilator and now I get the following error: |
Based on the unresolved dependencies, it looks like you've trying to use the % cd <...>/chisel-tutorial
% git checkout release
% git pull
% sbt test You may use the |
Following the steps here
At the "Generating Verilog" step when I run
./run-examples.sh GCD --backend-name verilator
command, I get an error like so:Any help?
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